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MPLAB ? REAL ICE ? In-Circuit Emulator User’s Guide
7.7.2
High-Speed Receiver Board
A high-speed receiver board assembly is also required when using LVDS connectivity.
This board is a counterpart to the high-speed driver board assembly in the pod. When
the driver is active on the pod, the receiver is active in the receiver board. Alternatively,
when the driver is active on the receiver board, the corresponding receiver is active in
the driver board, providing transmitting and receiving capability at both extremes. The
receiver board contains an 8-pin, 0.100 inch centers header, and is used to connect to
the target board. The receiver board circuit may be absorbed into the target system,
avoiding the usage of the receiver board.
FIGURE 7-4:
J1
8-PIN HEADER PINOUT
1
2
3
4
5
6
7
8
Top of
Target
Board
Pin Name Function
1 Vpp Power
2 Vdd_TGT Power on target
3 GND Ground
4 ICSPDAT Standard Com Data
*future feature
Pin
5
6
7
8
Name
ICSPCLK
AUX
DAT
CLK
Function
Standard Com Clock
Auxiliary
*Trace Data
*Trace Clock
FIGURE 7-5:
RECEIVER BOARD SCHEMATIC – ICSPDAT
NDATA_EN
3
AHC1G04-SOT5
4 2
DATA_EN
V DD _TAR
+3.3V
1
6
V CC A
V CC B
LVD+
4
DATA
DATA_EN
5
DIR
LVD-
100
2
6
1
7
SN65MLVD206
3
A
GND
B 4
ICSPDAT
4.7K
74LVC1T45_SOT-6P
3
DATAEN+
4
DATAEN-
100
6
7
2
1
DATA_EN
SN65MLVD206
DS51616A-page 46
? 2006 Microchip Technology Inc.
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